IBIS Macromodel Task Group

Meeting date: 05 sep 2006

Members (asterisk for those attending):
* Arpad Muranyi, Intel Corp.
* Barry Katz, SiSoft
* Bob Ross, Teraspeed Consulting Group
  Doug White, Cisco Systems
* Ian Dodd, Mentor Graphics
* Joe Abler, IBM
* John Angulo
  John Shields, Mentor Graphics
  Ken Willis, Cadence Design Systems
  Kumar, Cadence Design Systems
* Lance Wang, Cadence Design Systems
* Michael Mirmak, Intel Corp.
  Mike LaBonte, Cisco Systems
  Paul Fernando, NCSU
  Randy Wolff, Micron Technology
* Richard Ward, Texas Instruments
  Sanjeev Gupta, Agilent
  Shangli Wu, Cadence
* Todd Westerhoff, Cisco Systems
* Walter Katz, SiSoft

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Review of ARs:

We seem to have a surprisingly high percentage of opinion stories submitted, and I have trouble using the same form for news, blogs, and opinion.


- Restructure web pages (Mike LaBonte, in progress)

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New Discussion:

Mike asked for clarification on web page changes.
We will change Macromodel labels to Advanced Modeling Technology.
Mike will archive the macromodel site into a zip file first.

Arpad showed a presentation:
World's 1st "Peak Distortion Analysis model implemented in VHDL-AMS"
Arpad explained how the source code works.
Arpad encouraged us to take his code and play with it.

This approach is pessimistic. Arpad has not seen better algorithms.
We need algorithms for demonstration. Intel algorithms are protected.
Arpad looked at the StatEye website for sample algorithms, and found none.
Algorithms are not generally available.

Walter explained a little about StatEye. Every method starts with a
pulse response, which requires simple driver and receiver models, and
channel model. Pulse response can be processed numerous ways. It is
convolving a probability function, not a waveform. It must do this to
cover many bits.

Arpad suggested we should try the simplest approach first to decide
whether to proceed.

Walter said we have to partition into 2 problems: before and after the
reactive receiver load. The same language need not be used for these parts.

Richard believes it can be done in AMS, but TI has not yet "stitched it
together". TI only has pieces of the solution in AMS so far.
Joe does not believe AMS is viable for this problem.
It was noted that Kumar has said it has to be done in C.

Ian pointed out that SystemC came from the need for a synthesis language.
Walter said that companies will design in behavioral languages, then
implement in structural. RTL was mentioned.

Todd asked "If you design in one language and implement in another,
how do you correlate?". Some felt that designing and implementing in a
single language is preferable to different languages.

Michael Mirmak asked "Who does IBIS serve?". It was felt that we should
have more IC vendors in this group, and EDA vendors too.
We wondered what serdes vendors doing are doing for their design work.
So far they seem to be represented here by TI and IBM.

AR: Richard will see if Xilinx can join us.

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Next meeting: Tuesday 12 Sep 2006 12:00pm PT